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Opcode Trap for Diagnosis of Logic Faults

IP.com Disclosure Number: IPCOM000044029D
Original Publication Date: 1984-Oct-01
Included in the Prior Art Database: 2005-Feb-05
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Feeney, JW: AUTHOR [+2]

Abstract

A technique for the detection of logic faults consists of using signature analysis to determine if a failure has occurred. Because a signature has failed is usually not sufficient to diagnose the cause of the failure. Additional information can be acquired by looking at the states of the logic pins, that make up the signature, at the time the failure is detected. This technique is being used to detect faults in logic designs that contain some intelligence, such as a microprocessor, and that execute programs which test themselves and create the signature. The Opcode Trap is a method of collecting additional information in order to diagnose faults occurring in these cases. Each instruction operation code is collected as it is executed and stored in a buffer until the next instruction begins execution.

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Opcode Trap for Diagnosis of Logic Faults

A technique for the detection of logic faults consists of using signature analysis to determine if a failure has occurred. Because a signature has failed is usually not sufficient to diagnose the cause of the failure. Additional information can be acquired by looking at the states of the logic pins, that make up the signature, at the time the failure is detected. This technique is being used to detect faults in logic designs that contain some intelligence, such as a microprocessor, and that execute programs which test themselves and create the signature. The Opcode Trap is a method of collecting additional information in order to diagnose faults occurring in these cases. Each instruction operation code is collected as it is executed and stored in a buffer until the next instruction begins execution. To accomplish this, a memory is loaded with the number of cycles each operation code takes to execute. When the first operation code appears on the logic pins used in the signature, it is placed in the opcode storage buffer. In addition, it is used to address the memory in which the number of cycles of that instruction are stored. This count is then loaded into a down counter. As the instruction is executed, the counter is decremented for each cycle. When the counter reaches 0, that instruction is completed and a new opcode is executed. The process is then repeated for the new and all following opcodes. As a result, the last o...