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Digital Algorithmic Unit for Servo Control

IP.com Disclosure Number: IPCOM000044094D
Original Publication Date: 1984-Nov-01
Included in the Prior Art Database: 2005-Feb-05
Document File: 4 page(s) / 62K

Publishing Venue

IBM

Related People

Dickin, FD: AUTHOR [+2]

Abstract

A digital algorithmic unit, implemented on a large-scale integrated circuit chip as a number of programmed logic arrays, provides digital filtering for a number of sampled servo control loops concurrently. The digital filters have transfer functions suitable to effect the phase and amplitude compensation necessary in such servo loops and are defined by stored coefficients. The unit employs stored table multiplication techniques to calculate the filter output for a given input sample using the stored coefficients. A generalized schematic of a servo control loop is shown in Fig. 1. Typically, such loops may be employed for sampled servo head positioning or motor speed control in a disk file.

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Digital Algorithmic Unit for Servo Control

A digital algorithmic unit, implemented on a large-scale integrated circuit chip as a number of programmed logic arrays, provides digital filtering for a number of sampled servo control loops concurrently. The digital filters have transfer functions suitable to effect the phase and amplitude compensation necessary in such servo loops and are defined by stored coefficients. The unit employs stored table multiplication techniques to calculate the filter output for a given input sample using the stored coefficients. A generalized schematic of a servo control loop is shown in Fig. 1. Typically, such loops may be employed for sampled servo head positioning or motor speed control in a disk file. Sampled signals from the servo mechanism, which are representative of the deviation from a desired value of the quantity being controlled, are fed back via a compensator and applied to a motor driver for controlling the mechanism. Conventionally, the compensator would be an analogue filter operating on a continuous signal and its transfer function would be described in terms of a Laplace transform, H(s). However, in the present case, the compensation function is provided by the digital algorithmic unit operating on digitized sampled data. The transfer function of a digital filter can more conveniently be described by a z transform H(z) such that H(z) = U(z)/P(z) (1) where P(z) and U(z) are the input to and output from the filter. The z transform can be represented by the following difference equation which is in a convenient form for software implementation:

(Image Omitted)

The transfer function is completely defined by the coefficients aj, bj . However the algorithmic unit is a hardware implementation for which the following matrix expression is more suitable. A data flow representation of a digital filter for implementing the above matrix expression is shown in Fig. 2, which is shown expanded in Fig. 3 to identify the two paths (which are identical) for the computation of the output current value. The elements used are delays "T", multipliers "X", and adders "+". It can be seen that the quantities x1,......xn are
successively accumulated partial results so that the final sum a0Pi+xi gives the value of the output function Ui for the ith input sample Pi . It can be seen from the flow charts in Fig. 2 and Fig. 3 that the multiplication function is used many times. Multiplication generally takes a long time (e.g., Booths algorithm) or requires substantial hardware (e.g., Wallace tree). However, in this application the multiplicand (input P(z)) is a constant. Therefore, a stored partial product technique may be used. The products of every P(z) or C(z) sample with the numbers 0 to 15 are generated and stored in a work area of a 128 x 8-bit random-access memory (RAM). These multiples of P(z) or C(z) may then be read out of the RAM by using 4 bits of the multiplier (coefficients aj or bj) to address the RAM lo...