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Use of Request Tokens to Eliminate Address Dependencies on DMA Storage to Storage Transfers

IP.com Disclosure Number: IPCOM000044293D
Original Publication Date: 1984-Dec-01
Included in the Prior Art Database: 2005-Feb-05
Document File: 2 page(s) / 46K

Publishing Venue

IBM

Related People

Cook, RL: AUTHOR [+5]

Abstract

This article describes a multiprocessor configuration comprised of dissimilar processors connected by a Direct Memory Access (DMA) device, wherein the use of request tokens to identify specific data transfer requests eliminates the requirement for each processor to manipulate and understand storage addresses of the other processor. In the drawing, two processors P1 and P2 are shown, each having its own private storage, but working jointly on a single set of user tasks and jobs, and having a need for transferring data to and from its storage.

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Use of Request Tokens to Eliminate Address Dependencies on DMA Storage to Storage Transfers

This article describes a multiprocessor configuration comprised of dissimilar processors connected by a Direct Memory Access (DMA) device, wherein the use of request tokens to identify specific data transfer requests eliminates the requirement for each processor to manipulate and understand storage addresses of the other processor. In the drawing, two processors P1 and P2 are shown, each having its own private storage, but working jointly on a single set of user tasks and jobs, and having a need for transferring data to and from its storage. If the processors are attached through a DMA device, the transfers can be made quickly and efficiently by having the DMA device fetch from one processor's storage and store into the other processor's storage, using the addresses appropriate to each processor for the source and destination buffers. Any particular transfer request will be initiated by one processor or the other, as, for example, P1 wanting P2 to write a message to a terminal which is physically connected to P2. However, if the requesting processor signals the DMA device to move data by specifying the addresses of both the source and the destination buffers for the transfer, then considerable synchronization complexity and undesirable dependencies arise especially in a configuration of dissimilar processors and operating systems. That approach would require that each processor be able to manip...