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Assuring the Integrity of LSSD

IP.com Disclosure Number: IPCOM000044347D
Original Publication Date: 1984-Dec-01
Included in the Prior Art Database: 2005-Feb-05
Document File: 2 page(s) / 47K

Publishing Venue

IBM

Related People

Orr, MA: AUTHOR [+2]

Abstract

This article describes a device which insures that a string of latches is maintained in the same state when power is turned on. The Level Sensitive Scan Design (LSSD) polarity-hold design shown in Fig. 1 is used many times to generate logic signals that have various phase relationships to each other. By decoding the outputs of the latches in this circuit, clocks (Fig. 1A) of various duty cycles can be achieved. Correct circuit operation requires that all the latches "power-on" in the same logical state, and that none of the latches will be inadvertently set to the inverse of its proper state at any given time. Fig. 2 shows a design which insures that each of the latches in the string of Fig. 1 is guaranteed to be in the same state when power is turned on. The first latch in the string (Fig.

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Assuring the Integrity of LSSD

This article describes a device which insures that a string of latches is maintained in the same state when power is turned on. The Level Sensitive Scan Design (LSSD) polarity-hold design shown in Fig. 1 is used many times to generate logic signals that have various phase relationships to each other. By decoding the outputs of the latches in this circuit, clocks (Fig. 1A) of various duty cycles can be achieved. Correct circuit operation requires that all the latches "power-on" in the same logical state, and that none of the latches will be inadvertently set to the inverse of its proper state at any given time. Fig. 2 shows a design which insures that each of the latches in the string of Fig. 1 is guaranteed to be in the same state when power is turned on. The first latch in the string (Fig. 2) is changed to an LSSD set-reset latch, and by adding the two AND gates to the circuit it will correct itself if an illegal latch state relationship ever occurs. This circuit guarantees that all of the latches will be in the same state before latch 1 changes its value. In addition, even if one or more latches in the string changes states inadvertently, the latch outputs will eventually return to their correct relationships. The circuit cost for this correction circuit is technology dependent, but will be relatively small compared to the number of circuits needed to create the latch string. Fig. 3 shows an alternate embodiment wherein combinator...