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Generalized Interrupt Handler for a FORTH Machine

IP.com Disclosure Number: IPCOM000044361D
Original Publication Date: 1984-Dec-01
Included in the Prior Art Database: 2005-Feb-05
Document File: 4 page(s) / 61K

Publishing Venue

IBM

Related People

Lotspiech, JB: AUTHOR [+2]

Abstract

This article relates to indirect threaded code machines, the most popular of which are machines based on the language FORTH. These machines are usually implemented in software as interpreters, but hardware implementations are now being actively pursued. This article describes an improvement to interrupt handling in such systems. The improvements over the state of the art, as typified by reference [1] are as follows: 1. Some approaches simply do not work because the programmer does not realize that the return stack must be protected from interrupts. Described are three ways to protect the return stack including a preferred method of changing the instruction sequences of DOCOL and DODOE. 2.

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Generalized Interrupt Handler for a FORTH Machine

This article relates to indirect threaded code machines, the most popular of which are machines based on the language FORTH. These machines are usually implemented in software as interpreters, but hardware implementations are now being actively pursued. This article describes an improvement to interrupt handling in such systems. The improvements over the state of the art, as typified by reference [1] are as follows: 1. Some approaches simply do not work because the programmer does not realize that the return stack must be protected from interrupts. Described are three ways to protect the return stack including a preferred method of changing the instruction sequences of DOCOL and DODOE. 2. The PUT word described in the reference will not work if the processor's control store uses ROS (read-only storage) instead of RAM (random-access memory). By leaving a pointer to RETURN on the return stack, RETURN is left equally transparent to the user while allowing a ROS machine implementation. This interrupt handler can be adapted to any processor by changing the assembly level code. The implementation shown here is for the Intel 8085 and requires only 32 machine instructions to implement completely. When an interrupt is received, the following steps must take place: 1. The registers and status information must be saved; 2. The appropriate FORTH instruction to handle the interrupt must be executed; and 3. After the FORTH instruction has been completed, the registers and status information must be restored and the processor returned to the instruction being executed prior to the interrupt. Step one can be handled by assembly level code at interrupt time. The registers and status information can be restored using the FORTH word RETURN which is defined on screen number 2 (Fig. 1). When an interrupt occurs, the register and status information are saved, the PFA (Parameter Field Address) of RETURN is placed in the IP (Instruction Pointer) register, the address stored in the appropriate interrupt variable (5.5ISR, 6.5ISR, or 7.5ISR for the 8085) [2] is placed on the stack, and the FORTH word EXECUTE is executed. Therefore, a CFA (Code Field Address) (or a PFA in some FORTH systems) of an interrupt service routine must be stored in the interrupt variable. The reasons for choosing this method are: 1. The application-dependent portion of the interrupt handler and the system portion of the handler are linked only by the interrupt variables and, therefore, nothing need be known about the device-dependent portion of the interrupt service routines. When the programmer writes an interrupt service routine, it can be written completely in FORTH, if desired. The only rule the programmer must follow is that his interrupt service routine must leave the stack as it found it. Once the handler has been written, the system can be made aware of the handler by storing its CFA (or PFA) in the interrupt variable. 2. Whe...