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Utilizing Dynamic Chip Organization to Allow Both Strip and Rectangular Mapping to Memory

IP.com Disclosure Number: IPCOM000044450D
Original Publication Date: 1984-Dec-01
Included in the Prior Art Database: 2005-Feb-05
Document File: 2 page(s) / 39K

Publishing Venue

IBM

Related People

Ling, DT: AUTHOR [+2]

Abstract

Dynamic Chip Organization allows the user or application program to dynamically select either strip or rectangular mapping when updating a frame buffer. For this selection, the required chip hardware must be available and the appropriate mapping must be selected. The required chip hardware is the logic necessary to dynamically alter the chip configuration, e.g., for a 64K bit chip we may select 64K x 1, 32K x 2, 16K x 4. The appropriate mapping is shown in Fig. 1. Fig. 1 shows the square mapping, constructed to allow an arbitrary 2 x 2 square such as ab 12 to be written in one memory cycle. The chips are organized as 1 bit per chip (e.g., 64K x 1). It is seen that each of the four bits of any 2 x 2 square is sent to a different chip. The row and/or column address to the chips may need to be incremented (e.g.

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Utilizing Dynamic Chip Organization to Allow Both Strip and Rectangular Mapping to Memory

Dynamic Chip Organization allows the user or application program to dynamically select either strip or rectangular mapping when updating a frame buffer. For this selection, the required chip hardware must be available and the appropriate mapping must be selected. The required chip hardware is the logic necessary to dynamically alter the chip configuration, e.g., for a 64K bit chip we may select 64K x 1, 32K x 2, 16K x 4. The appropriate mapping is shown in Fig.
1. Fig. 1 shows the square mapping, constructed to allow an arbitrary 2 x 2 square such as ab 12 to be written in one memory cycle. The chips are organized as 1 bit per chip (e.g., 64K x 1). It is seen that each of the four bits of any 2 x 2 square is sent to a different chip. The row and/or column address to the chips may need to be incremented (e.g., to write the square 23 tu) and this function may be performed by hardware located either on or off the memory chip. Fig. 1 also shows that a strip mapping can be constructed to allow an arbitrary horizontal strip, such as abcd, to be written in one memory cycle. Each of the chips is reconfigured to have two bits per chip, e.g., 32K x 2. Such a chip should logically contain two subportions or islands each containing 32K bits and each connected to one of the I/O drivers. With such chips, the four bits can be written either by writing two bits to chip 0 and two bits to chi...