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BLANKET As IMPLANT TO IMPROVE DEVICE RELIABILITY ON MEDIUM VOLTAGE PRODUCTS

IP.com Disclosure Number: IPCOM000044470D
Original Publication Date: 1984-Dec-01
Included in the Prior Art Database: 2005-Feb-06
Document File: 2 page(s) / 38K

Publishing Venue

IBM

Related People

Bergeron, DL: AUTHOR

Abstract

When two adjacent P regions are reverse biased at elevated temperatures, an inversion layer is formed in the n- epitaxy between the P regions, resulting in excessive leakage between them. This article describes a blanket arsenic (or other n type dopant) implant which is used to raise the n-epitaxy surface concentration and minimize any surface instability that leads to P-P leakage on technologies wherein depletion layers are allowed to merge under operating conditions. This modification eliminates the process fluctuation's effects on the failure rate kinetics, thus solving the reliability problem without a costly layout change. Using the As implant 11 process eliminates P-P leakage problems on technologies which employ SiO2 13, Si3N414 and Pyro 15 layer passivation and which allow the depletion layers to merge under bias.

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BLANKET As IMPLANT TO IMPROVE DEVICE RELIABILITY ON MEDIUM VOLTAGE PRODUCTS

When two adjacent P regions are reverse biased at elevated temperatures, an inversion layer is formed in the n- epitaxy between the P regions, resulting in excessive leakage between them. This article describes a blanket arsenic (or other n type dopant) implant which is used to raise the n-epitaxy surface concentration and minimize any surface instability that leads to P-P leakage on technologies wherein depletion layers are allowed to merge under operating conditions. This modification eliminates the process fluctuation's effects on the failure rate kinetics, thus solving the reliability problem without a costly layout change. Using the As implant 11 process eliminates P-P leakage problems on technologies which employ SiO2 13, Si3N414 and Pyro 15 layer passivation and which allow the depletion layers to merge under bias. This situation is outlined in Fig. 1 wherein the depletion layers xd1 and xd2 merge at the epi surface. This minimizes wiring capacitance while eliminating the inherent charge instabilities associated with the Pyro layer 15. By altering the As dose, the parasitic field- effect technology (FET) threshold can be raised to a level in excess of the technology's objective of 26 V, thus eliminating any surface instability resulting in P-P leakage. The device junction breakdowns BVcbo and BVceo as well as the parasitic FET threshold are shown as a function of the As implant dos...