Browse Prior Art Database

Silicon Integrated High Performance Package

IP.com Disclosure Number: IPCOM000044529D
Original Publication Date: 1984-Dec-01
Included in the Prior Art Database: 2005-Feb-06
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Cicone, RA: AUTHOR [+3]

Abstract

A technique is described whereby a double-decked mounting approach is used to mount silicon circuit chips to provide a greater degree of package integration. Performance is significantly improved with this package, because the distance between chips is reduced. The silicon integrated high performance package (SIHP), as shown in the drawing, has silicon circuit chip 2 mounted on top of chip 1 by means of solder connections 3. The solder connections 3 reduce thermal stress, allowing larger chip sizes to be used. Chip 1 is connected to a multilayer ceramic (MLC) carrier 4 by wire bonds 5 or by tape automated bonding. The MLC 4 has pins and chips on the same side in order to improve package cooling efficiency. The bottom side 6 allows external cooling to be mounted, such as a heat sink or cold plate.

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Silicon Integrated High Performance Package

A technique is described whereby a double-decked mounting approach is used to mount silicon circuit chips to provide a greater degree of package integration. Performance is significantly improved with this package, because the distance between chips is reduced. The silicon integrated high performance package (SIHP), as shown in the drawing, has silicon circuit chip 2 mounted on top of chip 1 by means of solder connections 3. The solder connections 3 reduce thermal stress, allowing larger chip sizes to be used. Chip 1 is connected to a multilayer ceramic (MLC) carrier 4 by wire bonds 5 or by tape automated bonding. The MLC 4 has pins and chips on the same side in order to improve package cooling efficiency. The bottom side 6 allows external cooling to be mounted, such as a heat sink or cold plate. After assembly, a hermetic cap 7 is installed. It is important to note that the MLC carrier has the ability to have more than one integrated chip mounted on the carrier. This type of chip has the ability to carry additional chips in order to provide higher integration.

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