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Modified Salicide Process With Via Dry Etch Stop

IP.com Disclosure Number: IPCOM000044624D
Original Publication Date: 1984-Dec-01
Included in the Prior Art Database: 2005-Feb-06
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Choi, KW: AUTHOR [+2]

Abstract

The current drive toward increased circuit density and chip area reduction results in severe topological variations leading to 90Πwalls between gate electrodes and adjacent diffusions. The most current "salicide" approach utilizes E-beam deposited Ti to react with open junctions and gate electrodes. A modified salicide process is described herein that prevents overetching of shallower vias until all the vias are opened. The process sequence is as follows: 1. Deposit, by either E-beam or chemical vapor deposition (CVD), the Ti, followed by the deposition of 200 to 300 of cobalt (Co). 2. Perform the salicide diffusion within the temperature range of 600 to 700 C. This will yield layered silicides without significant interdiffusion of the layered metals over the oxide zones.

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Modified Salicide Process With Via Dry Etch Stop

The current drive toward increased circuit density and chip area reduction results in severe topological variations leading to 90OE walls between gate electrodes and adjacent diffusions. The most current "salicide" approach utilizes E-beam deposited Ti to react with open junctions and gate electrodes. A modified salicide process is described herein that prevents overetching of shallower vias until all the vias are opened. The process sequence is as follows:
1. Deposit, by either E-beam or chemical vapor deposition (CVD), the Ti, followed by the deposition of 200 to 300 of cobalt (Co). 2. Perform the salicide diffusion within the temperature range of 600 to 700 C. This will yield layered silicides without significant interdiffusion of the layered metals over the oxide zones. It will also yield 700 to 1000 of CoSi2 over the TiSi2 . For the case of CVD Ti, the E-beam Co would not cover vertical steps, as would the Ti, but since the TiSi2 is the main current carrier, and etch stop capability is only required in horizontal zones, thin sidewall coverage with the Co is not necessary. 3. Perform the selective etch procedure (for excess unreacted metal removal), with the sequence of exposure first to acidic peroxide solution, that selectively removes the cobalt, and secondly to basic peroxide solution, that selectively removes the Ti. The CoSi2 is not attacked by either. 4. Passivation is carried out with boro- phospho-sili...