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High Temperature Polyimide-Based Lift-Off Process

IP.com Disclosure Number: IPCOM000044625D
Original Publication Date: 1984-Dec-01
Included in the Prior Art Database: 2005-Feb-06
Document File: 2 page(s) / 41K

Publishing Venue

IBM

Related People

Acosta, RE: AUTHOR [+3]

Abstract

This article relates generally to the processing of integrated circuits and more specifically to a high-temperature lift-off process which permits the deposition for lift-off to be done at temperatures of up to 450ŒC and also provides the capability of using refractory metals in the lift-off process. Lift-off is an additive method of pattern definition which is widely used for line definition. Its use is limited in that the maximum temperature at which a deposition may be done is limited to the maximum temperature that the resist can stand. This limitation precludes its use in situations where refractory metals, such as titanium, have to be evaporated.

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High Temperature Polyimide-Based Lift-Off Process

This article relates generally to the processing of integrated circuits and more specifically to a high-temperature lift-off process which permits the deposition for lift-off to be done at temperatures of up to 450OEC and also provides the capability of using refractory metals in the lift-off process. Lift-off is an additive method of pattern definition which is widely used for line definition. Its use is limited in that the maximum temperature at which a deposition may be done is limited to the maximum temperature that the resist can stand. This limitation precludes its use in situations where refractory metals, such as titanium, have to be evaporated. The present process is not so limited, and the ability to use high temperatures during evaporation leads to improved step coverage, ensures high quality films, and provides better electrical properties and better impurity control. Fig. 1 shows a cross-sectional view of a substrate Q-aminopropyltriethoxysilane 1 of silicon or other semiconductor at an intermediate stage in the lift-off process of the article. A layer 2 of an adhesion promoter, such as and a layer 3 of polyamic acid are spun-on in succession onto the surface of substrate 1. A layer 4 of silicon having a thickness of 1000 ~ is evaporated onto layer 3. A layer of photoresist, such as AZ1350J*, is then formed, patterned and developed using well-known lithographic techniques on the surface of layer 4, providing a plurality of photoresist regions 5 which act as a mask in a subsequent step. Fig. 2 shows a cross-sectional view of substrate 1 after silicon layer 4 has been patterned and polyamic acid layer 4 has been subjected to an imidizat...