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Multi Value Resistor for Gate Arrays

IP.com Disclosure Number: IPCOM000044815D
Original Publication Date: 1984-Oct-01
Included in the Prior Art Database: 2005-Feb-06
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Culican, EF: AUTHOR [+2]

Abstract

Gate array design flexibility is highly desirable. In many instances the user requires the option of at least two power levels. This may be accomplished through contact personality. Resistors are commonly defined by a combination of base diffusion and ion implant sections allowing for a wide range of resistor values within the physical restriction of the cell size.

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Multi Value Resistor for Gate Arrays

Gate array design flexibility is highly desirable. In many instances the user requires the option of at least two power levels. This may be accomplished through contact personality. Resistors are commonly defined by a combination of base diffusion and ion implant sections allowing for a wide range of resistor values within the physical restriction of the cell size.

In order to make the multi power level usable in a wide range of applications the fabrication technique should allow for each critical resistor to be adjusted independently during personality processing. This may be accomplished as follows. The base sections of the resistor are designed to be wide at the area of ion implantation. If a narrow ion implant (I1) is employed, a relatively high value resistor will be fabricated. If a wide ion implant (I2) is employed, a relatively low value resistor will be fabricated.

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