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Plasma Oxide Filled Deep Dielectric Isolation

IP.com Disclosure Number: IPCOM000045066D
Original Publication Date: 1983-Jan-01
Included in the Prior Art Database: 2005-Feb-06
Document File: 2 page(s) / 14K

Publishing Venue

IBM

Related People

Basi, JS: AUTHOR [+2]

Abstract

Deep dielectric isolation requires filling of the deep trench pattern in a monocrystalline silicon substrate with an insulating medium a and planarizing. It also requires a "buried" conductor for reach-through to the P-substrate for electrical contact thereto.

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Plasma Oxide Filled Deep Dielectric Isolation

Deep dielectric isolation requires filling of the deep trench pattern in a monocrystalline silicon substrate with an insulating medium a and planarizing. It also requires a "buried" conductor for reach-through to the P-substrate for electrical contact thereto.

Silicon dioxide is a logical and attractive medium for dielectric filling of the trench pattern, but experiments have shown that the thermal stresses caused by chemical vapor deposited (CVD) silicon dioxide filling, at 850 degrees C or higher, induce dislocations in the silicon substrate which rendered the process unacceptable. Except for this problem, the silicon dioxide filled trench has several attractive features, such as the possibility of letting the contact openings fall over the trench to achieve higher density in memory and logic chips.

The present technique has two features that make it usable: (1) post emitter trench formation and filling, and (2) low temperature deposition of the silicon dioxide. Avoidance of large thermal heat cycles after the trench etching eliminates the dislocations in the silicon.

The usual bipolar semiconductor process is followed through the emitter drive-in heat cycle and reoxidation. The steps associated with deep trench formation and filling are, however, omitted because the trench will be made after the emitter drive-in. The thickness of the emitter reoxidation is increased somewhat in this method. Also, it is better to reduce the differences in the thicknesses of the silicon dioxide layer over contacts to facilitate subsequent opening of the contacts with one mask.

The remaining process steps are as follows:

1. CVD silicon nitride blanket deposition of 50 nanometers or more. Any low temperature CVD process can be used, for example, low pressure (LPCVD) or plasma silicon nitride. The emitter d...