Browse Prior Art Database

Voice and Data Transmission

IP.com Disclosure Number: IPCOM000045099D
Original Publication Date: 1983-Jan-01
Included in the Prior Art Database: 2005-Feb-06
Document File: 3 page(s) / 37K

Publishing Venue

IBM

Related People

Desbordes, PB: AUTHOR [+3]

Abstract

This is a voice and data transmission system. The proposed architecture is based on the fact that two main functions have to be performed, i.e., voice compression, and voice and data multiplexing.

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Voice and Data Transmission

This is a voice and data transmission system. The proposed architecture is based on the fact that two main functions have to be performed, i.e., voice compression, and voice and data multiplexing.

Voice compression consists in reducing the voices PCM data rate from 64 Kbps to 7,200 bps using split band and dynamic allocation of quantizing bit techniques. More particularly, the 64 Kbps is fed into a Voice Excited Predictive Coder (VEPC) which derives PARCOR parameters (K) therefrom; these parameters are used to derive a redundance-free residual signal from the original vocal signal. The residual signal is fed into a low-pass filter which derives therefrom a band-limited or residual baseband signal together with information relating to the energy (E) contained within the removed high frequency bandwidth. The residual baseband is in turn split into p sub-bands, the contents of which are requantized using dynamic bit rate allocation techniques. It should be noted that the above speech analysis operations are performed over blocks of samples 20 ms long. The residual baseband is thus processed in block companded PCM (BC PCM). Each block of samples provides one or two E, a block of eight PARCOR coefficients, and requantized samples such that the overall bit rate is limited to 7,200 bps.

Conversely, on the receiving side of the transmission network, energies, PARCORS and samples will have to be recombined for synthesizing the original speech signal.

Both analysis and synthesis of the speech signal are performed using a single tributary microprocessor MP1. Every 125 microseconds, the PCM coded data is serially loaded into a shift register SR1, and then transferred into an...