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Modulation Level Monitor with Program Controlled Digital Filter

IP.com Disclosure Number: IPCOM000045132D
Original Publication Date: 1983-Feb-01
Included in the Prior Art Database: 2005-Feb-06
Document File: 3 page(s) / 39K

Publishing Venue

IBM

Related People

Laczko, L: AUTHOR

Abstract

This "go-no go" modulation level monitor measures the modulation frequency by measuring the slope between two predetermined reference levels. The slope is defined as the time it takes for the leading edge of the modulation envelope to arrive from the first reference level to the second one. The time is measured by counting carrier pulses. The count is used as an accept/reject criteria and is set by digital control.

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Modulation Level Monitor with Program Controlled Digital Filter

This "go-no go" modulation level monitor measures the modulation frequency by measuring the slope between two predetermined reference levels. The slope is defined as the time it takes for the leading edge of the modulation envelope to arrive from the first reference level to the second one. The time is measured by counting carrier pulses. The count is used as an accept/reject criteria and is set by digital control.

A basic functional diagram is given in Fig. 1. The modulated carrier signal to be monitored is applied to an input terminal 10. This signal is applied to three paths. The first path is the input to a comparator circuit 12 to which a reference potential VREF is applied for comparison. The output of the comparator circuit 12 corresponds when the modulation envelope of a carrier exceeds the VREF level, indicated as VREF equals 100 percent. This level is the peak voltage of the unmodulated carrier. See Fig. 2.

The input signal Is also applied to an MMB (modified missing bit) circuit 14, which comprises essentially a zero crossing detector 16, a counter 18, a digital count decoder 20 and a set/reset (S/R) latch circuit 22.

A high level at the output of the comparator circuit 12 enables the latch 22 and the counter to start counting the carrier pulses. Low level of output from the comparator circuit 12 resets the counter 18 to zero.

The count decoder 20 responds when the number of pulses equals a preset number set at terminal 24. The value of this number is controlled by a program in the usual way. The output of the latch 22 is high if the modulation envelope is higher than VREF and longer than the duration of the number of carrier pulses selected by the count decoder 20.

The input signal is also applied by way of a separate path...