Dismiss
InnovationQ will be updated on Sunday, Oct. 22, from 10am ET - noon. You may experience brief service interruptions during that time.
Browse Prior Art Database

Josephson Logic Circuit Process Using Edge Junctions

IP.com Disclosure Number: IPCOM000045151D
Original Publication Date: 1983-Feb-01
Included in the Prior Art Database: 2005-Feb-06
Document File: 3 page(s) / 54K

Publishing Venue

IBM

Related People

Faris, SM: AUTHOR [+2]

Abstract

This articles relates to Josephson junction technology and more particularly to edge junction devicss and a process for producing such devices.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 54% of the total text.

Page 1 of 3

Josephson Logic Circuit Process Using Edge Junctions

This articles relates to Josephson junction technology and more particularly to edge junction devicss and a process for producing such devices.

In designing high performance Josephson junctions, the junction capacitance has to be minimized for many applications. This allows one to approach the intrinsic high speed of the junctions and, in the case of switching applications, to alleviate the punch through problem. In large scale integration (LSI), reproducibility and stability of the tunnel barrier are very stringent requirements. Consequently, junctions made of niobium are more attractive than those made of soft lead alloys. Niobium junctions, however, have about three times larger capacitance. Normally, in order to obtain niobium junctions with acceptable capacitance, one has to resort to electron beam lithography capable of linewidths smaller than 1 Mum. The edge junction concept is capable of producing the desired small area with conventional photolithography.

This article describes a fabrication process for making

Josephson logic circuits which has the following features: 1) The edge-junction concept is used to obtain small capacitance junctions with conventional photo-lithography. 2) The number of fabrication steps is smaller than in the conventional Josephson technology. This results from using

the ground plane as the base electrode of the junctions. The

fabrication yield is therefore improved. 3) Novel and compact multi-junction configurations are realized. 4) Donut shaped junctions are used to realize large critical currents with acceptable density.

Process Description.

The circuit shown in Fig. 1A represents part of a direct current injection logic circuit. It is used as an example to describe the process. The junctions J1 and J2, as shown in Fig. 1B, are made by contacting M2A, the counter electrode, with the edge of M1A, which is the ground plane. Note that J1 is connected directly to ground, whereas J2 is isolated from ground by means of an island of M1A which is then connected to the resistor R1A via M3. As shown in Fig. 1C, only seven masks are required to fabricate the circuit.

Mask 1 defines areas in the Nb(2)O(5) insulating layer I1A which exposes niobium ground plane M1A for direct contact.

Mask 2 defines patterns in the ground plane M1A by means of ion milling or reactive ion etching, thus exposing M...