Browse Prior Art Database

Individual Chip Rework Probe

IP.com Disclosure Number: IPCOM000045162D
Original Publication Date: 1983-Feb-01
Included in the Prior Art Database: 2005-Feb-06
Document File: 2 page(s) / 70K

Publishing Venue

IBM

Related People

Arent, GR: AUTHOR [+5]

Abstract

A probe useful for ICR (Individual Chip Rework) procedures, as described below, contains elements for applying heat to defective chip sites by means of thermal conduction and elements for applying vacuum to the same site for removing a defective chip after the solder reflow temperature has been reached.

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Individual Chip Rework Probe

A probe useful for ICR (Individual Chip Rework) procedures, as described below, contains elements for applying heat to defective chip sites by means of thermal conduction and elements for applying vacuum to the same site for removing a defective chip after the solder reflow temperature has been reached.

In earlier procedures for chip rework, a multichip module is preheated (in an oven) to a bias temperature which prevents the module substrate from acting as a heat sink relative to individual chips, and thereby permits localized heat absorption at individual chip solder sites. The module is then placed in a rework atmosphere, and localized infrared heating is directed at individual defective chip sites (one site at a time). When the proper reflow temperature is reached at each site, vacuum is applied to remove the defective chip. The defective chip is discarded, and a copper block is placed at the removed site. Heat then applied to the copper cleans the site of excess solder. The module substrate is then cooled down and readied for chip replacement via another procedure.

Fig. 1 illustrates potentially more efficient apparatus and procedure for performing the same functions. Heat applied from cartridge heating element 1 to the tip of conductive probe 2 is directly transferred to a defective chip 3 and conducted to solder 4 which underlies the chip. The probe tip can rotate slightly to accommodate irregularities in chip flatness. Thermoc...