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Reduction of Test Points in a Signature Analysis Test System

IP.com Disclosure Number: IPCOM000045166D
Original Publication Date: 1983-Feb-01
Included in the Prior Art Database: 2005-Feb-06
Document File: 2 page(s) / 47K

Publishing Venue

IBM

Related People

Davis, GT: AUTHOR [+3]

Abstract

This article relates to the multiplexing of output signals onto a single test point, thus saving on the number of test points required. A special interface card, called a personality card, is used to interface with the card under test and provide signals back to the test CPU. By multiplexing signals from the card under test to test points on the personality card, the number of test points is reduced.

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Reduction of Test Points in a Signature Analysis Test System

This article relates to the multiplexing of output signals onto a single test point, thus saving on the number of test points required. A special interface card, called a personality card, is used to interface with the card under test and provide signals back to the test CPU. By multiplexing signals from the card under test to test points on the personality card, the number of test points is reduced.

Signature analysis is becoming a leading testing technique for microprocessor based products. The figure shows the multiplexing of eight data lines onto a single test point (TP). The data bus is parallel loaded into the eight- bit shift register each time an I/O read operation is executed. The signal that would normally be used to clock the signature analyzer (SA) is instead used to gate the parallel load of the shift register. The CPU clock-out is then used to clock the shifting operation. For example, an I/O read operation may require 10 CPU clock cycles, thus guaranteeing enough clock cycles to shift all eight bits of the data bus onto the composite test point even where multiple I/O read instructions occur back-to-back. The CPU clock-out is also used to clock the signature analyzer so that a sample of each bit in each word read from a peripheral device may be included in the composite signature. Thus, the key advantage of this technique is to reduce the number of measurements the tester has to make. Since a very significant percentage of the measurements will be on the data bus and the quantity of these measurements is reduced by a factor of eight, the amount of documentation is si...