Browse Prior Art Database

Signature Analysis Functional Tester

IP.com Disclosure Number: IPCOM000045167D
Original Publication Date: 1983-Feb-01
Included in the Prior Art Database: 2005-Feb-06
Document File: 3 page(s) / 34K

Publishing Venue

IBM

Related People

Davis, GT: AUTHOR [+3]

Abstract

An automated test equipment utilizing signature analysis techniques is described. The device provides for checking proper operation of a circuit and, if improper, for troubleshooting the circuit to identify the faulty component.

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Signature Analysis Functional Tester

An automated test equipment utilizing signature analysis techniques is described. The device provides for checking proper operation of a circuit and, if improper, for troubleshooting the circuit to identify the faulty component.

The architecture of the device is shown in Figs. 1A and 1B. A CPU 10 is combined with standard peripherals, such as a keyboard CRT device 11, diskette drives 13 and a printer 14. A dynamic random access memory (RAM) provides storage for operational software and tables used to control the test sequence. One of the tables stored in the RAM 15 contains all of the microcode required to exercise the card under test. This microcode is advantageously divided into segments, each of which is completely self contained routine which runs in a loop for signature analysis. This microcode is down-loaded by the CPU, one segment at a time, into a small dual-port static RAM 16. When the CPU releases reset to the card under test (CUL) 17, the microprocessor on the card under test (or on the personality card 18) is then able to execute an individual routine, looping the routine continuously until all signatures relating to that routine have been measured. On completion of a set of measurements, reset to the card under test will be reactivated while the next microcode routine is down-loaded into static RAM 16.

The signature analysis (S.A.) unit 19 includes multiplexers for start, stop, clock and data lines. The desired parameters are selected from output instructions produced by the CPU 10 and are sequenced automatically by the CPU. For each required signature, the analyzer 19 will sample the selected data line with the appropriate clock. Once the complete start/stop interval has been sampled, the signature analyzer card generates an interrupt to the CPU. The CPU can then read the actual signature and compare it to the expected signature. If a defect in the start/stop or clock signal prevents the analyzer from compiling a signature, an error time-out will flag the CPU to check the signature analyzer status register for further information concerning the problem.

All test fixtures 20 plug into a common base 21. This interface consists of the CPU channel, the static RAM interface, the signature analyzer interface, and programmable power supply (PPS) voltages. An output port address is reserved in the tester I/O map so that the CPU can toggle reset on the...