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Method to Realize Submicrometer Wide Images

IP.com Disclosure Number: IPCOM000045210D
Original Publication Date: 1983-Feb-01
Included in the Prior Art Database: 2005-Feb-06
Document File: 3 page(s) / 77K

Publishing Venue

IBM

Related People

Jambotkar, CG: AUTHOR

Abstract

A method is described for realizing very narrow images having typically submicrometer wide dimensions. The technique facilitates this while using conventional 2.5-3.0 micron lithography. Applications of this technique to realize submicrometer wide resistors and deep dielectric isolation walls are also described. A preferred process is as follows.

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Method to Realize Submicrometer Wide Images

A method is described for realizing very narrow images having typically submicrometer wide dimensions. The technique facilitates this while using conventional 2.5-3.0 micron lithography. Applications of this technique to realize submicrometer wide resistors and deep dielectric isolation walls are also described. A preferred process is as follows.

(1) Starting with silicon wafer 1, form cover layers 2 and 4 of SiO(2) and Si(3)N(4), respectively. Using conventional lithography, form required patterns in Si(3)N(4) 4 and SiO(2) 2, preferably employing reactive ion etching (RIE). See Fig. 1.

(2) Preferable using wet (BHF) etching, form undercuts in SiO(2)2 2 of any desired lateral depth of the order of 0.2-1.0 micron, as indicated in Fig. 2.

(3) Through chemical vapor deposition (CVD), deposit a conformal layer 6 of Si(3)N(4), as shown in Fig. 3.

(4) Exploiting vertical directionality of RIE, etch away Si(3)N(4)6 except for its shadowed portions. See Fig. 4.

(5) Grow thermal SiO(2) layer 8 at the exposed silicon surface, a typical thickness of the SiO(2) being about 2000 Angstroms. See Fig. 5.

(6) Form windows in Si(3)N(4) 4 and SiO(2) 2 of width dimensions equal to, or greater than, 2.5 microns using conventional lithography. See Fig. 6. This process step is entirely optional.

(7) Using a selective etchant such as hot phosphoric acid, remove all Si(3)N(4) as show in Fig. 7.

The result of the above method will be observed to be the realization of submicrometer wide images in SiO(2) of any desired width. The typical width would be in the range of 0.2-1.0 micron, being equal to the lateral depth of the undercuts formed in step 2 above.

Submicrometer wide resistors may be realized using the above general technique in the following manner.

Through conventional diffusion or ion implantation, introduce P or N type impurities in the submicrometer wide exposed silicon regions of Fig. 7. In the case of ion implantation, doping of portions of the exposed silicon can be easily prevented, if desired, by using a suitable photoresist mask. Following the doping step, passivate the exposed silicon by means of thermal or pyrolytic SiO(2). Open contact windows in SiO(2) and, optionally, introduce a P+ or N+ dopant in the contact regions, preferably through ion implantation. Form metallization in a conventional manner.

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Further, submicrometer wide deep dielectric isola...