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Method to Reduce Breakdown Yield Loss in Thin Film Capacitors During Fabrication

IP.com Disclosure Number: IPCOM000045233D
Original Publication Date: 1983-Feb-01
Included in the Prior Art Database: 2005-Feb-06
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Howard, JK: AUTHOR [+3]

Abstract

Top electrodes or both top and bottom electrodes of individual thin film capacitors on a silicon wafer are shorted in the capacitor fabrication to improve yield and facilitate use of RF sputter cleaning.

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Method to Reduce Breakdown Yield Loss in Thin Film Capacitors During Fabrication

Top electrodes or both top and bottom electrodes of individual thin film capacitors on a silicon wafer are shorted in the capacitor fabrication to improve yield and facilitate use of RF sputter cleaning.

A silicon wafer that has hundreds of isolated capacitors is potentially vulnerable to reactive ion etching or the RF sputter process because individual chips can build up transient voltages due to local fluctuation in ions and electrons. By connecting all the capacitor plates together, the entire wafer acts as a large capacitor and the voltage build-up is reduced considerably since capacitance is increased considerably and the charge to be stored is small. This tie-up of the chips is done in the kerf area of the wafer so that the temporary connections between the capacitors are discontinued when the chips are scribed.

In addition, the top and bottom electrodes of the capacitors can be tied together or shorted in the kerf area. In this case, no voltage can ever build up across the dielectric and DC sputter cleaning can be used as well as AC sputter cleaning.

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