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Guard Ring MOS Test Structure Without Photolithography

IP.com Disclosure Number: IPCOM000045236D
Original Publication Date: 1983-Feb-01
Included in the Prior Art Database: 2005-Feb-06
Document File: 3 page(s) / 71K

Publishing Venue

IBM

Related People

Miller, DA: AUTHOR

Abstract

"MOS capacitors" have long been used as monitors for various physical/ electrical parameters of importance in the manufacture of silicon semiconductor devices. The simplest form of fabrication is to (a) thermally oxidize and anneal the silicon wafer at high temperature, (b) vacuum deposit metal dot electrodes, such as aluminum, through a contact shadow-mask, such as thin molybdenum sheet containing a pattern of circular holes. (Such masks can be made by simple photolithography, and can be chemically cleaned of the deposited metal build-up, after use). The silicon substrate contact can be made by blanket deposition of the metal on the backside, after the oxide is etched off from much or all of the backside area.

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Guard Ring MOS Test Structure Without Photolithography

"MOS capacitors" have long been used as monitors for various physical/ electrical parameters of importance in the manufacture of silicon semiconductor devices. The simplest form of fabrication is to (a) thermally oxidize and anneal the silicon wafer at high temperature, (b) vacuum deposit metal dot electrodes, such as aluminum, through a contact shadow-mask, such as thin molybdenum sheet containing a pattern of circular holes. (Such masks can be made by simple photolithography, and can be chemically cleaned of the deposited metal build-up, after use). The silicon substrate contact can be made by blanket deposition of the metal on the backside, after the oxide is etched off from much or all of the backside area. Depending on the metal deposition source, and on the application of the fabricated MOS wafer, a "fast surface states anneal" can be performed in dilute hydrogen, such as 5 percent hydrogen in nitrogen, at 350 to 450 degrees
C.

Various techniques exist in the literature for measuring the electrical properties of the MOS capacitor under transient bias conditions (e.g., fast ramp, pulsed voltage, etc.), using the response parameters of capacitance, charge, current, voltage, time, amplitude, high frequency excitation, such as 1 megahertz). With a light shielded probe station, the MOS characteristics under conditions of deep depletion can be used to study minority carrier lifetime, the inversely related generation current, or, simply, the capacitance recovery toward equilibrium inversion. In a well made MOS wafer, with fast surface states annealed, isolated devices with very fast recovery characteristics can be classified as having "catastrophic defects", to some established criterion, thereby permitting yield calculations.

Depending on the experimental procedures, such

"MOS-leakage"'tests can be used to monitor any and all of the following:

(a) Initial wafer quality (e.g., grown-in silicon lattice

defects, residual mechanical damage after polish, bulk

and/or surface contaminated with lifetime killing

metallic impurities),

(b) Contamination and/or damage from handling and/or

cleaning procedures,

(c) Contamination of hot process furnaces, or other

tooling,

As the state of the art has produced silicon wafers with progressively longer minority carrier lifetimes, it has become increasingly necessary to separate surface lateral leakage (proportional to gate electrode perimeter, P) from bulk generation (proportional to gate area, A). (Room temperature is assumed for discussion, to avoid complications of minority carrier bulk diffusion current, etc.). Simply making large diameter MOS dots, to reduce the P to A ratio, can require devices on the order of one centimeter diameter, which limits the resolution for locating defective areas of the wafer. Guard-ring electrodes of various types (the simplest being a metal ring around the MOS metal dot) can be used to limit lateral surface cu...