Browse Prior Art Database

Automatic Trimming of Josephson Devices

IP.com Disclosure Number: IPCOM000045354D
Original Publication Date: 1983-Mar-01
Included in the Prior Art Database: 2005-Feb-06
Document File: 2 page(s) / 24K

Publishing Venue

IBM

Related People

DeLuca, JC: AUTHOR [+2]

Abstract

This article relates generally to the fabrication of Josephson junction devices and more particularly to the automatic trimming of Josephson junctions on a full-wafer basis.

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Automatic Trimming of Josephson Devices

This article relates generally to the fabrication of Josephson junction devices and more particularly to the automatic trimming of Josephson junctions on a full- wafer basis.

In the figure, a circuit is shown which incorporates an ion-beam source 1 which is used to irradiate a silicon wafer 2 on which layers of niobium and niobium oxide have been deposited, for example, to form a Josephson junction over the entire extent of the wafer. Wafer 2 is monitored by a room temperature tester 3 which determines the tunnelling resistance R(N) which, in turn, is directly related to the critical current of the junction. A comparator 4, the output of which is connected to a feedback loop 5, has as its inputs the current through the junction and a reference current R(N) (reference). Comparator 4 compares the desired current for optimum performance with the current actually monitored. The amplified feedback current in feedback loop 5 is used to drive ion-beam source 1 until the desired value is reached. At this point, the feedback current drops to zero and ion-beam source 1 is shut off automatically.

The above technique permits the recycling of wafers which do not meet the desired critical current criterion and further permits the alteration of the junction properties on a full-wafer basis, thereby increasing the yield of the overall fabrication process.

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