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Microcomputer Controlled Integrating Demodulator for Low Frequency Signals

IP.com Disclosure Number: IPCOM000045388D
Original Publication Date: 1983-Mar-01
Included in the Prior Art Database: 2005-Feb-06
Document File: 3 page(s) / 44K

Publishing Venue

IBM

Related People

Cavill, BR: AUTHOR [+3]

Abstract

The present integrating demodulator is used in two places in a motor tester to evaluate motor resistance and to evaluate motor capacitance. This motor tester application of the integrating demodulator is seen in Fig. 1. Synchronization is performed inside the microcomputer based on the excitation signal. This signal can come from a number of sources and is selected by the multiplexer (MUX). The analog-to-digital converter (ADC) output is a changing digital representation of the AC error signal. This error signal is the difference between the real and simulated motor currents. Both the real and simulated motor are driven by an AC voltage riding on a DC drive level. The system constant parameters of the simulated motor are specified by the values present in multiplying digital-to-analog converters (DACs).

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Microcomputer Controlled Integrating Demodulator for Low Frequency Signals

The present integrating demodulator is used in two places in a motor tester to evaluate motor resistance and to evaluate motor capacitance. This motor tester application of the integrating demodulator is seen in Fig. 1. Synchronization is performed inside the microcomputer based on the excitation signal. This signal can come from a number of sources and is selected by the multiplexer (MUX). The analog-to-digital converter (ADC) output is a changing digital representation of the AC error signal. This error signal is the difference between the real and simulated motor currents. Both the real and simulated motor are driven by an AC voltage riding on a DC drive level. The system constant parameters of the simulated motor are specified by the values present in multiplying digital-to-analog converters (DACs).

Initial multiplying values are stored in the microcomputer, and an estimate is made at the value to be established (Fig. 2). The microcomputer integrates (accumulate the error count from the ADC) for an entire excitation cycle. The integrated sum is cleared, and the microcomputer waits until the positive edge of the excitation is reached. Then a flag indicating the positive excitation cycle is set. The microcomputer waits till the ADC clock is positive to obtain the error reading from the ADC. If the excitation is on a positive cycle and was previously, the measured ADC value is subtracted from the integral sum and testing continues with the next ADC clock cycle. If the excitation is on a negative cycle, the measured ADC value is added to the integral sum and the positive cycle indicator is cleared.

If the excitation is positive and was previously negative (IOLD=0), the excitation cycle is complete. The integral sum is then tested and if the sum is positive, the value in the multiplying DAC f...