Browse Prior Art Database

Program Timer Device

IP.com Disclosure Number: IPCOM000045426D
Original Publication Date: 1983-Mar-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 38K

Publishing Venue

IBM

Related People

Williams, DD: AUTHOR

Abstract

It is often desirable to know the absolute amount of time spent in a specific program module or modules when executing a given computer program. One reason for measuring the module time is to identify the critical time consumers so that appropriate corrective action can be taken. The device shown in the figure may be used to accurately measure these times in either a single or cumulative mode.

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Program Timer Device

It is often desirable to know the absolute amount of time spent in a specific program module or modules when executing a given computer program. One reason for measuring the module time is to identify the critical time consumers so that appropriate corrective action can be taken. The device shown in the figure may be used to accurately measure these times in either a single or cumulative mode.

Referring to the figure, an address bus and strobe line are connected to a pair of comparators 10 and 12 to which are also respectively coupled start and stop select buses. Comparators 10 and 12 compare the address bus data with the start and stop bus data to generate the respective set and reset signals for in- range flip- flop 14.

The output of flip-flop 14 and the clock signal are applied to AND gate 16, the output of which is provided to the gated count input of B:CD counter 18. The clock rate select determines the granularity of the final time measurement. The output of counter 18 is continuously displayed via the light-emitting diodes 20. BCD counter 18 is cleared by the output of OR gate 22, which is activated by either closure of reset button 24 or the provision of a start signal generated by comparator 10 when switch 26 is closed. Switch 26 provides the option of measuring the cumulative time in the module when the switch is open or the last execution path length in the module when the switch is closed.

Thus, the circuit shown in the figure has...