Browse Prior Art Database

Array Word/Bit Line Driver Circuit

IP.com Disclosure Number: IPCOM000045469D
Original Publication Date: 1983-Mar-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 61K

Publishing Venue

IBM

Related People

Crispi, FJ: AUTHOR [+3]

Abstract

The array push-pull driver circuit shown in Fig. 1 is personalized (first level metal connected) from the devices of two TTL (transistor-transistor logic) AND-INVERT logic cells, as depicted in Fig. 2. The circuit performs a logical AND function. The inputs and outputs are TTL compatible. Operation All inputs to T1 up ("1"). T1 is forward biased, T2 is Off, T3 and T4 are On, and T5 is off. The circuit output is actively pulled down by T4. Any input to T1 down ("0"). T1 is Off, T2 is On, and T3 and T4 are Off. T5 is forward biased. The output is actively pulled up by T5.

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Array Word/Bit Line Driver Circuit

The array push-pull driver circuit shown in Fig. 1 is personalized (first level metal connected) from the devices of two TTL (transistor-transistor logic) AND-INVERT logic cells, as depicted in Fig. 2. The circuit performs a logical AND function. The inputs and outputs are TTL compatible.

Operation All inputs to T1 up ("1").

T1 is forward biased, T2 is Off, T3 and T4 are On, and T5 is

off.

The circuit output is actively pulled down by T4.

Any input to T1 down ("0").

T1 is Off, T2 is On, and T3 and T4 are Off. T5 is forward

biased.

The output is actively pulled up by T5.

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