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Instruction Memory Checking

IP.com Disclosure Number: IPCOM000045475D
Original Publication Date: 1983-Mar-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Beraud, JP: AUTHOR

Abstract

This article describes a means for checking the contents of an instruction memory within a microprocessor, with the simple addition of a short (18 instructions) diagnostic program.

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 99% of the total text.

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Instruction Memory Checking

This article describes a means for checking the contents of an instruction memory within a microprocessor, with the simple addition of a short (18 instructions) diagnostic program.

Let us assume that the microprocessor is provided with an address capability of 64K. Under normal operating conditions, a sequencer controls a program counter register or Instruction Address Register (IAR) to address the instruction memory over a 16-bit address bus.

The 32K instructions located in the upper and lower half portions of the instruction memory are scanned with the same 15 least significant address bits, respectively. The only difference is that the most significant bit (MSB) is zero for the upper half and one for the lower half.

Under test program controlled operations, the sequencer is made to operate conventionally and provide a 16-bit long instruction address. While the upper portion of the instruction memory is being scanned, a 32K value is added to the instruction address within the sequencer to force the instruction address MSB to one.

This MSB is not fed to the instruction address bus, and thus appears as being equal to zero when addressing the instruction memory. This ascertains that only the upper half portion of the instruction is being read out. The fetched instructions are parity checked. However, the one-valued MSB is used as a NOP (no operation) controlling bit which is used to keep the currently fetched instruction from being exec...