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Browse Prior Art Database

Diagnostic Device

IP.com Disclosure Number: IPCOM000045504D
Original Publication Date: 1983-Apr-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 60K

Publishing Venue

IBM

Related People

Owens, GR: AUTHOR [+2]

Abstract

Trouble shooting microprocessors is difficult because it is often necessary to monitor as many as 60 digital signal lines simultaneously. The signals are usually changing state at megahertz rates and not normally in any periodic pattern, thus making normal debugging techniques impractical if not impossible. The circuit set forth in the drawing provides the ability to trigger latching and display of the monitored signals on the nth occurrence of a particular combination of signal states.

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Diagnostic Device

Trouble shooting microprocessors is difficult because it is often necessary to monitor as many as 60 digital signal lines simultaneously. The signals are usually changing state at megahertz rates and not normally in any periodic pattern, thus making normal debugging techniques impractical if not impossible. The circuit set forth in the drawing provides the ability to trigger latching and display of the monitored signals on the nth occurrence of a particular combination of signal states.

The System Control Lines, Data Bus, + Data Bus, - Address Bus, + Address Bus and +/- Micellaneous signals are applied to buffers B1-B6 inclusive which minimize load on the System Bus lines and provide invert functions for minus active signals. Thus, plus and minus active data and address lines can be monitored selectively under control of data selectors S1 and S2 which are controlled by selector switches T1. The selector switches T1 also control data selector S3 for selecting either plus or minus Miscellaneous signals from buffer B6.

Buffer B1, data selector S1 and data selector S2 feed displays D1, D2 and D3, respectively. The displays can be set up for on-the-fly signal latching to enable system real-time testing.

In order to sense given signal conditions, i.e., address match interrupt, etc., and hold the microprocessor or sync on the condition, a data compare circuit Cl provides a pulse output each time the selected address bus lines match the switch set-up of...