Browse Prior Art Database

Indexing Data Transfers

IP.com Disclosure Number: IPCOM000045523D
Original Publication Date: 1983-Apr-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 3 page(s) / 50K

Publishing Venue

IBM

Related People

Hales, KG: AUTHOR [+2]

Abstract

A plurality of hosts are connected via a plurality of channel adapters to direct-access storage devices (DASDs) and a random-access storage data buffer which caches data for the host that is normally stored in the DASDs. Data transfers between DASDs and the host include preparatory steps wherein the channel adapter compares a host-supplied identification with a DASD supplied identification. These identifications are logical for identifying data stored in a record track of the DASD. Such identifications may include count and key fields. The buffer is controlled by a microprocessor which cannot perform the channel adapter comparison in time for successfully initiating a data transfer nor does it have access to the electronic circuits of the channel adapter for performing such comparisons.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 47% of the total text.

Page 1 of 3

Indexing Data Transfers

A plurality of hosts are connected via a plurality of channel adapters to direct-access storage devices (DASDs) and a random-access storage data buffer which caches data for the host that is normally stored in the DASDs. Data transfers between DASDs and the host include preparatory steps wherein the channel adapter compares a host-supplied identification with a DASD supplied identification. These identifications are logical for identifying data stored in a record track of the DASD. Such identifications may include count and key fields. The buffer is controlled by a microprocessor which cannot perform the channel adapter comparison in time for successfully initiating a data transfer nor does it have access to the electronic circuits of the channel adapter for performing such comparisons. For enabling transfers between the buffer and the DASD, each rotational section of the DASD is assigned a physical rotational index value, with the index value being logically associatable with the host-supplied identifications.

In certain operations, it is desired to transfer a portion of the data contents of a single record track directly to the host and then transfer the remainder of the record track into the data buffer.

Such successive transfers usually occur during time-separated periods. Accordingly, during the transfer between the host and the DASD wherein the electronic circuits compare identifications, the microprocessor monitors the index values of all of the data being transferred and stores the last index value. Upon initiating a data transfer between a DASD and a buffer, the captured and stored index value identifies the data to be transferred, avoiding the logical compare of the identification fields. In this manner, the data transfers between the buffer and the DASD occur without duplicating electronic circuits of the channel adapter in the data buffer and avoid the time delay of a microprocessor doing an extensive programmed compare. The data transfer is initiated independent of any DASD data format constraints.

A data storage subsystem is attachable to a plurality of hosts through a plurality of channel adapters. Each channel adapter has means for receiving and storing a host supplied identification (ID) useful for identifying data on a record track as well as determining parameters necessary for a successful data transfer. The effect of a successful comparison is to identify to the host the successful comparison for allowing the host to supply a channel command for effecting data transfers between the DASD and the host. In effect, the comparison enables the host-DASD data transfers.

Most data storage subsystems are controlled by a microprocessor which includes a control store (not shown) for storing programs determining the operational characteristics of the data storage subsystem. For enhancing performance of a subsystem, a data buffer of the random-access type (short access time) is logically interposed...