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Browse Prior Art Database

Variable Byte Length ROS

IP.com Disclosure Number: IPCOM000045601D
Original Publication Date: 1983-Apr-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 3 page(s) / 84K

Publishing Venue

IBM

Related People

Blum, DW: AUTHOR

Abstract

A method is provided for making a variable organized read-only store (ROS) chip by utilizing the mask which personalizes the storage cells of a memory array.

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Variable Byte Length ROS

A method is provided for making a variable organized read-only store (ROS) chip by utilizing the mask which personalizes the storage cells of a memory array.

A first ROS memory system, indicated in Fig. 1, is provided with the use of a first contact level mask on a given chip which simultaneously personalizes the memory array and selects three different byte sizes: a 12-bit byte, an 8-bit byte and a 7-bit byte. A second ROS memory system, indicated in Fig. 2, is provided with the use of a different contact level mask on a chip similar to the given chip which simultaneously personalizes the memory array and selects multiple bytes each of which may have, e.g., 9 bits per byte.

Each of the first and second ROS memory systems further utilizes in the chips a series of diffusion regions or subcollector underpasses and contacts to program the chip for either of the two systems during the contact personalization mask step, as indicated in Fig. 3. Contacts in Fig. 3 have been made to provide the ROS system of Fig. 1.

As can be seen in Fig. 3, on a semiconductor chip 10 there is provided a bit line decoder having output lines A, B and C and a ROS array of memory cells to which bit lines 1 to 27 are connected. Disposed under bit lines 1 to 9 is a first diffusion region or subcollector underpass D1 in chip 10, under bit lines 10 to 18 is a second diffusion region D2, and under bit lines 19 to 27 is a third diffusion region D3. Also, there is disposed under bit lines 1 to 12 a fourth diffusion region D4, under bit lines 13 to 20 a fifth diffusion region D5, and under bit lines 21 to 27 a sixth diffusion region D6. Ab Since chip 10 in Fig. 3 is connected into a ROS system as indicated in Fig. 1, contacts c are located between each of the bit lines 1 to 12 and diffusion region D4 and between decoder output line A and diffusion region D4, providing a 12-bit byte. The 8-bit byte is provided by arranging contacts c between each of the bit lines 13 to 20 and dif...