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Locating Attributed Mask Personalization from Unattributed Description

IP.com Disclosure Number: IPCOM000045656D
Original Publication Date: 1983-Apr-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 3 page(s) / 60K

Publishing Venue

IBM

Related People

Hurd, JJ: AUTHOR [+2]

Abstract

Certain masks typically used to fix the status of a read-only store (ROS) or a programmable logical array (PLA) are a series of transparent openings in an opaque background. Where the openings exist only at selected ones of the possible locations, the mask is personalized and the ROS or PLA made from such a mask is correspondingly personalized. When software defining a personalized mask does not have location information as an attribute of each possible opening location, that may be obtained, as here described, by merging in ordered sequence the unattributed information with an attributed description of the mask with all locations assumed to carry the same information.

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Locating Attributed Mask Personalization from Unattributed Description

Certain masks typically used to fix the status of a read-only store (ROS) or a programmable logical array (PLA) are a series of transparent openings in an opaque background. Where the openings exist only at selected ones of the possible locations, the mask is personalized and the ROS or PLA made from such a mask is correspondingly personalized. When software defining a personalized mask does not have location information as an attribute of each possible opening location, that may be obtained, as here described, by merging in ordered sequence the unattributed information with an attributed description of the mask with all locations assumed to carry the same information.

As is conventional, the ROS and PLA circuits of interest are solid-state devices formed on a single substrate or chip. The memory or logic is personalized by the blocking or passing of ions (or the essential equivalent) to localized areas. In a typical embodiment, ions which pass make a field-effect transistor (FET) into an enhancement mode FET, while similar FETs at blocked locations remain depletion-mode devices.

To achieve such personalization, one element in the fabrication process is a single optical mask designed with selected openings in shapes dictated by the circuit elements involved. That optical mask is used by conventional techniques to ultimately block or pass ions to the chip in a pattern defined by the mask.

Typically, such design is highly computer-assisted. Software produces the repetitive shapes at all possible opening locations with a unique designation as an attribute to each location. (See Fig. 1, which is illustrative only. The numbers are the location attributes.) The designer need only input, once the form of shape requested (which may be a cluster of different shapes as appropriate) and the distance between shapes. The software produces the designated shape and will replicate the pattern defined repetitively as specified. As an incident of such replication, the software assigns a unique, location-attribute number to each shape location. (Such a unique number is generally more useful than attempting to work with the x, y Cartesian coordinates for each shape location.)

Where personalization information is known by the designated locations, this may be entered by location attribute. The automatic production of information defining the mask using such entry is an established capability of the software.

In certain applications the personalization information may be by entry which does not specify each location by location attribute. The designer may call an image of the mask onto the screen of a cathode ray tube (CRT) from software and dictate changes in the personalization by reference to the information on the screen. (This is illustrated in Fig. 2. Graphics from attributed data is examined on the CRT and modified by use of a standard control.) Such entry is also an establis...