Browse Prior Art Database

Early Forced Castout Scheme for MP System

IP.com Disclosure Number: IPCOM000045732D
Original Publication Date: 1983-Apr-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 3 page(s) / 36K

Publishing Venue

IBM

Related People

Tan, KG: AUTHOR

Abstract

In a store in cache (SIC) algorithm for cache management, the 'changed data' stays in the cache until either one of the following two conditions occurs: a. The data is cast out (store to main memory) due to the normal cache line LRU (least recently used) replacement. b. The data is requested by other processors; hence. a forced 'castout' takes place. The data-sharing phenomenon, as indicated in case (b) above, causes significant performance degradation in the multiprocessor (MP) environment and has motivated several new design proposals, such as a shared cache and a cache to cache transfer scheme. One of the key components in the shared data relates to invoking the 'system lock' before accessing the shared data (such as control blocks).

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Early Forced Castout Scheme for MP System

In a store in cache (SIC) algorithm for cache management, the 'changed data' stays in the cache until either one of the following two conditions occurs: a. The data is cast out (store to main memory) due to the normal cache line LRU (least recently used) replacement. b. The data is requested by other processors; hence. a forced 'castout' takes place.

The data-sharing phenomenon, as indicated in case (b) above, causes significant performance degradation in the multiprocessor (MP) environment and has motivated several new design proposals, such as a shared cache and a cache to cache transfer scheme. One of the key components in the shared data relates to invoking the 'system lock' before accessing the shared data (such as control blocks). A simple control mechanism is described herein which will identify the shared data which has been changed (such as fields of control blocks) during the "locking" period. These lines are identified as candidates for early castouts when later fetch miss occurs. The objective is to castout the 'shared and changed' data as soon as the processor finishes it and before the other processors need it in real time. Therefore, the early castout mechanism will reduce the cache interference of the first processor as well as reduce the waiting time of the second processor. This mechanism integrates well with the conventional SIC organization as well as the cache-to-cache transfer organization.

The sequence of invoking system locks to access shared data is indicated below: See Original.

When 'Compare and Swap' is successful (indicates the ownership of system lock), the system program will perform a series of data manipulations in the shared data area. After these functions are completed, it will restore the system lock to its original value.

Notice in this sequence of events, between obtaining of the system lock (CS) and the release of the lock (ST), a series of 'Store' operat...