Browse Prior Art Database

Silicon Tunnel Diode Process for Bipolar Technology

IP.com Disclosure Number: IPCOM000045822D
Original Publication Date: 1983-Apr-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 30K

Publishing Venue

IBM

Related People

Ahlgren, DC: AUTHOR [+2]

Abstract

This process enables the integration of a tunnel diode into the conventional silicon bipolar process. The tunnel diodes can be used for high high density static bipolar memory as well as logic applications.

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Silicon Tunnel Diode Process for Bipolar Technology

This process enables the integration of a tunnel diode into the conventional silicon bipolar process. The tunnel diodes can be used for high high density static bipolar memory as well as logic applications.

The process begins with a P- monocrystalline silicon substrate 10 having a N- epitaxial silicon layer 12 thereover with an appropriate pattern of N+ subcollectors 14 and P+ isolation diffusions 16 within the silicon body P+ doped regions 18 for the base and resistors, and N+ doped regions 20 for the emitters or formed within the epitaxial layer 12. The collector is reached through N+ diffusion regions 22. As usual, recessed oxide regions 24 can also be incorporated into the process, immediately after the N- epitaxial step, to reduce metal wiring capacitance. So far the process proceeds in a conventional manner, and further detailed explanations are therefore omitted.

The incorporation of the tunnel diode into the bipolar process is as follows: An additional photoresist masking step is used to open a window 26, preferably over an N+ collector reach-through region as shown in the figure and implant or diffuse arsenic to increase the surface concentration to at least about 5 x 10/19/ atoms/cm. The implant damage is removed by annealing. This step may not be necessary if the collector reach-through surface has already obtained the required surface concentration. Note that before application of the photoresist, ai...