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Random Compensation Scheme for Bit Error

IP.com Disclosure Number: IPCOM000045854D
Original Publication Date: 1983-Apr-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 3 page(s) / 54K

Publishing Venue

IBM

Related People

Asada, S: AUTHOR [+2]

Abstract

This article describes a random compensation scheme for errors in a bit stream which inserts a random bit pattern into bit positions of the bit stream at which data bits could be erroneously changed or deviated due to analog modulation/demolation and telephone line characteristics in a facsimile system, whereby the print quality at a receiver facsimile terminal is greatly improved.

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Random Compensation Scheme for Bit Error

This article describes a random compensation scheme for errors in a bit stream which inserts a random bit pattern into bit positions of the bit stream at which data bits could be erroneously changed or deviated due to analog modulation/demolation and telephone line characteristics in a facsimile system, whereby the print quality at a receiver facsimile terminal is greatly improved.

It is assumed that the image "k", shown in Fig. 1, is transmitted from a sender facsimile terminal to a receiver facsimile terminal. The image "k" is represented by a bit pattern which is shown superimposed shown in the Fig. 1. Lack of accuracy in modulation and demodulation, which is inherent to an analog modem, causes undesired deviation in a received or demodulated bit pattern, as shown in Fig. 2. More particularly, data bits in the original bit pattern, around which the transition of data from "1" to "0" or from "0" to "1" occurs, would be unexpectedly deviated or changed during the transmission through the analog modem. For example, data bits "001100" in bit positions 6 through 11, pel (picture element) line, 1, of the original bit pattern would be deviated to "000100" as shown in Fig. 2.

The two bit positions, such as 7 and 8 in pel line 1, which are followed by the data bit "1" and the two bit positions, such as 10 and 11, which follow this data bit "1", are identified as the gray areas, shown enclosed in Fig. 2.

To recover the original bit pattern, one prior-art approach called for the insertion of a predetermined bit pattern, such as "11" into the gray areas, i.e., the bit positions 7, 8, 10 and 11, resulting in recovered or compensated bit pattern, as shown in Fig. 3A.

Fig. 3B shows the printed Image of the compensated bit pattern, (Fig. 3A) in accordance with the prior approach. It is apparent that the printed image of the Fig. 3B is very different than the original image due to the existence of an excessive amount of black, which also provides a viewer with a hard contrast of the printed image on a paper.

The random compensation scheme of this article solves the problems by inserting a random pattern into the gray area. As shown in Fig. 4A, the random bit patterns, i.e., "00", "01", "10" and "11", are generated by a random pattern generator which generates them in accordance with data bits in the bit patterns, which are separated from the gray area, and these random bit patterns are arbitrarily inserted into the gray areas, respectively, with the rule that the total number of sequential data bits "1" is three of the minimum or four at the maximum. Fig. 4B shows the resulting printed image of the randomly compensated bit pattern of Fig. 4A.

The comparison of the printed image in Fig. 4B with that shown in Fig. 3B indicates how the random compensation scheme of this article solves the problems described above.

The random compensation scheme is incorporated into a bit converter circuit in the...