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Portable Test Tool for High Speed Signal Analysis

IP.com Disclosure Number: IPCOM000045872D
Original Publication Date: 1983-Apr-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 4 page(s) / 50K

Publishing Venue

IBM

Related People

Pechanek, GG: AUTHOR [+2]

Abstract

A portable test tool is configured with components which facilitate high-speed signal analysis. Various functions including peak and valley detection, frequency counting, duty cycle measurements, programmable thresholding for sample and hold and analog to digital conversion trigger for all signals, programmable filtering, synchronous conversions, level detecting and pulse detecting may be accomplished utilizing the system.

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Portable Test Tool for High Speed Signal Analysis

A portable test tool is configured with components which facilitate high- speed signal analysis. Various functions including peak and valley detection, frequency counting, duty cycle measurements, programmable thresholding for sample and hold and analog to digital conversion trigger for all signals, programmable filtering, synchronous conversions, level detecting and pulse detecting may be accomplished utilizing the system.

The system includes a microcomputer 11 with a two-level interrupt 12, 13 structure, output lines 14 and a bidirectional data bus 15. Digital or analog signals to be analyzed are provided at 16 to the input of multiplexer 17, one signal being selected by an output signal 14 from microcomputer 11 to pass through multiplexer 17 to its output 18.

The bidirectional bus 15 is connected to allow data to be written into the digital to analog converter (DAC) 19 and to read data from the analog to digital converter (ADC) 20.

The timer counter interrupt circuit 22 provides two outputs on lines 12 and 13 which are used to generate interrupts to microcomputer 11 and to trigger the sample and hold circuit 23 and analog to digital converter 20. The timer output polarity can, under program control, be configured as active low or active high. The gating on and off of the timer circuit 22 is controlled by the T gate input 24 which permits program control of polarity. T gate 24 is actuated by the output of a voltage comparator 25 having a programmable threshold 26 from digital to analog converter 19. Thus, the signal to be analyzed appearing at the output of multiplexer 17 on line 18 can be used to trigger T gate 24 when above or below the preset threshold 26. The timer counter 22 is read and written to by microcomputer 11 in varied modes to accommodate the functions previously listed. A brief description of the procedure for initiating each function follows:

1. Peak and Valley Detection
a. Select (14) signal (16).
b. Set polarity of T gate active low.
c. Initialize timer T0 or T1 to a count less than 20 decimal.

(1 count equals 250 nanoseconds).
d. Set DAC value to minimum negative.
e. Increment DAC.
f. Repeat (e) if interrupt did not occur. If interrupt occurred,

save DAC value as valley or signal minimum.
g. To find signal maximum, set polarity of T gate active high. h. Initialize T0 or T1 timer to a count less than 20 decimal.
i. Initialize DAC value to maximum positive value.
j. Decrement DAC.
k. Repeat (j) if interrupt did not occur. If interrupt occurred,

save DAC value as signal maximum.

2. Frequency Counting
a. Use Function 1 to find peak and valley.
b. Find midpoint of there two values and initialize DAC to this

1

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value.
c. Set T gate active high.
e. If interrupt occurs, increment timer count and reinitialize

timer.
f. Repeat (e) until no interrupt occurs. The tim...