Browse Prior Art Database

Electrostatic Discharge Protection for Chip I/O Resistors

IP.com Disclosure Number: IPCOM000045884D
Original Publication Date: 1983-Apr-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 41K

Publishing Venue

IBM

Related People

Yu, CC: AUTHOR

Abstract

In a bipolar input circuit, a base diffusion region C is added to form an additional electrostatic discharge (ESD) diode to protect the p-resistor R. The subcollector is extended to the region below the added base diffusion. Since point C is closer to the input than point A, the ESD current from the input to ground (subcollector) will mostly go through the diode C. Therefore, the p-resistor R between A and B is protected from this type of ESD damage.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 100% of the total text.

Page 1 of 2

Electrostatic Discharge Protection for Chip I/O Resistors

In a bipolar input circuit, a base diffusion region C is added to form an additional electrostatic discharge (ESD) diode to protect the p-resistor R. The subcollector is extended to the region below the added base diffusion. Since point C is closer to the input than point A, the ESD current from the input to ground (subcollector) will mostly go through the diode C. Therefore, the p- resistor R between A and B is protected from this type of ESD damage.

The size of diode C can be adjusted to suit the desired ESD voltage rating. The optional recessed oxide isolation (ROI) E can be put in to isolate the p- resistor from diode C.

Fig. 1 is a schematic diagram of the bipolar chip input circuit. Fig. 2 shows the structure of the circuit.

1

Page 2 of 2

2

[This page contains 3 pictures or other non-text objects]