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Interrupt Priority Assignment Based on Arrival Time

IP.com Disclosure Number: IPCOM000045893D
Original Publication Date: 1983-Apr-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 46K

Publishing Venue

IBM

Related People

Boggs, JK: AUTHOR

Abstract

This article describes circuitry for permitting interrupt requests of the same nominal priority to be handled on a "first come/first-served" basis. The current value in a continuously active countdown counter is assigned to each interrupt request as it occurs. When the system is finally able to process interrupts. the request having the highest assigned value is handled first.

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Interrupt Priority Assignment Based on Arrival Time

This article describes circuitry for permitting interrupt requests of the same nominal priority to be handled on a "first come/first-served" basis. The current value in a continuously active countdown counter is assigned to each interrupt request as it occurs. When the system is finally able to process interrupts. the request having the highest assigned value is handled first.

The circuit is described in more detail with reference to the drawing. The circuit includes a master or countdown counter 10 which cycles continuously at a fixed rate. The current count in counter 10 is made continuously available to a register selecting/counter gate circuit 12 which, under the control of an interrupt request, may assign that current value to one of a plurality of source priority registers 14A, 14B, 14C, which are associated with corresponding input interrupt lines A, B, C. There obviously could be more than the three input lines and priority registers shown.

The input lines are connected both to output AND gates 16A, 16B, 16C and to input latches 18A, 18B, 18C. The latches 18A - 18C detect and hold interrupt pulses occurring on the corresponding input lines. The outputs of latches 18A, 18B, 18C are applied to corresponding AND gates 20A, 20B, 20C. A second input to each of the AND gates 20A - 20C is provided by an inverter 22 which is connected to a low-order bit in the countdown counter 10. The outputs of AND gates 20A -...