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Method for Simulation and Testing of Analogue/Digital Circuits

IP.com Disclosure Number: IPCOM000045929D
Original Publication Date: 1983-May-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Brown, DJ: AUTHOR [+2]

Abstract

A method for simulation and testing of complex integrated circuit modules and cards including a mix of analogue and digital devices using Computer Aided Design (CAD) tools produced for testing and simulating digitally orientated switching circuits only, involves conceptually reducing the analogue content of the circuit to a combination of logic gates representing the analogue functions. Provided the combination produced can respond to digital input patterns in the same way as the actual circuits would respond to the same inputs from a CAD tester, then the circuit can be said to be represented. The benefit of this method of simulation and testing is that the models can be used on any module or card irrespective of the nature of the surrounding circuits.

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Method for Simulation and Testing of Analogue/Digital Circuits

A method for simulation and testing of complex integrated circuit modules and cards including a mix of analogue and digital devices using Computer Aided Design (CAD) tools produced for testing and simulating digitally orientated switching circuits only, involves conceptually reducing the analogue content of the circuit to a combination of logic gates representing the analogue functions. Provided the combination produced can respond to digital input patterns in the same way as the actual circuits would respond to the same inputs from a CAD tester, then the circuit can be said to be represented. The benefit of this method of simulation and testing is that the models can be used on any module or card irrespective of the nature of the surrounding circuits. Accordingly, the models are independent of any individual test generator and any algorithm for generating test patterns can be used.

The combination of logic gates in the model need not have a one-- to-one correspondence with the analogue circuits, provided the number of I/O nets for the circuits needing diagnostics are represented. It is therefore essential to decide, before modelling, what possible faults can occur on the circuit and proceed to modelling so that all these faults can be represented. Sometimes, because of the complex analogue nature of a circuit, it may not be possible to represent all the faults. In such a case, given the ratio of test...