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Product Self-Test Signature Testing

IP.com Disclosure Number: IPCOM000046032D
Original Publication Date: 1983-May-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 36K

Publishing Venue

IBM

Related People

Muhr, JT: AUTHOR

Abstract

It is possible to implement a self-test function by monitoring appropriate bus lines from a logic circuit module or larger assembly and create a test signature therefrom. This test signature is based on a parity bit generated for each of the test output states on the bus lines being monitored. The parity bit based signature is then stored in RAM (random-access memory) during each operative cycle. This process can be repeated in parallel n times.

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Product Self-Test Signature Testing

It is possible to implement a self-test function by monitoring appropriate bus lines from a logic circuit module or larger assembly and create a test signature therefrom. This test signature is based on a parity bit generated for each of the test output states on the bus lines being monitored. The parity bit based signature is then stored in RAM (random-access memory) during each operative cycle. This process can be repeated in parallel n times.

This technique effectively stores all responses dynamically, as they are derived at the functional speed for any applied test. After the test is complete, the RAM is read at a more convenient speed and a signature is created that is unique to the test just run for the product under test.

The use of a parity bit to create the resultant test signature enables the use of a single datum to compress a multi-line result. This advantage permits the use of reduced storage facilities and data manipulation.

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