Browse Prior Art Database

Storage Controller Simulator

IP.com Disclosure Number: IPCOM000046088D
Original Publication Date: 1983-May-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 4 page(s) / 81K

Publishing Venue

IBM

Related People

Benedict, MK: AUTHOR [+3]

Abstract

This simulator will help bring up an External Data Controller (EXDC) of a data processing system in the absence of a Storage Controller (SC) subsystem. The design simulates functions of an SC subsystem.

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Storage Controller Simulator

This simulator will help bring up an External Data Controller (EXDC) of a data processing system in the absence of a Storage Controller (SC) subsystem. The design simulates functions of an SC subsystem.

The primary functions of an SC are (1) command queueing and (2) command execution (including data transfer). The EXDC sends various commands to the SC. The SC stores these commands and executes them in an order which may or may not be the same as the order they came in. The SC can interrupt a command acceptance sequence and issue a transfer warning for a previously stored command. It can execute all the commands in the command queue (CQ) until CQ is empty. It can store commands one after another without executing any of them until CQ is full; then it can execute all of them until CQ is empty.

The SC simulator shown in Fig. 1 performs all the functions mentioned above. It can store up to sixteen commands in its CQ. In order to control execution of the stored commands, coding of the command is done. The simulator decodes this coding and generates a set of controls. Also coded is the order in which commands are to be executed. When a command comes in, the simulator looks at the order of execution (for example '5') and stores the command in the proper address (hex '5') of the CQ.

It is also possible to code the release of various commands. A command can be released early or late with a specified status code, or it can be released at the end of the data transfer with a status code normal or other than normal. The status queue (SQ) provides the facility to store the various status codes via a scan-in technique.

The command coding for the release includes the address for the SQ where a desired status code is stored.

Command Coding for the SC Simulator

The SC simulator uses double word commands which conform to the

format of SC commands. Bytes 0, 1 and 3 are used by the SC simulator for its controls as follows.

Command Execution Control

Byte 0, bits 2 and 3 10 = Interrupt next command acceptance protocol with transfer warning, and execute previously stacked commands.

01 = Stack command.

00 = Empty command stack by executing commands in the

specified order after stacking present command.

(This also could happen when command stack is

full.

In this case it may or may not interrupt a

service request (SRV REQ).)

1

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Byte 0 bits 4, 5, 6 and 7 command execution order (hex character). That is, "0" is first to be executed, "1" is second, . . . "F" is last to be executed.

Command/Data Status Controls

Byte 1 bits 5, 6, 7 Address of status code; that is

000 (#1 status code through 111

(#8 statuscode).

Byte 1 bits 2, 3 Command/data status time select

00 - normal status

01 - early status

10 - late status

11 - data status

Byte 3 Starting address of SC simulator data array for data array for data transfer.

Protocol Control Logic

The bottom of Fig. 1 shows the SC/EXDC protocol control logic block. Fig. 2 shows a funct...