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Browse Prior Art Database

Synchronous Amplitude Demodulator

IP.com Disclosure Number: IPCOM000046138D
Original Publication Date: 1983-Jun-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 27K

Publishing Venue

IBM

Related People

Frankeny, RF: AUTHOR

Abstract

A circuit is provided which both amplifies and demodulates the signal sensed from a capacitive encoder. The key to the circuit involves the use of a single CMOS NOR gate to accomplish both the amplification and the demodulation.

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Synchronous Amplitude Demodulator

A circuit is provided which both amplifies and demodulates the signal sensed from a capacitive encoder. The key to the circuit involves the use of a single CMOS NOR gate to accomplish both the amplification and the demodulation.

Carrier escapements on many printers utilize capacitive encoders to generate position signals. For example, a 300 KHz carrier signal is amplitude modulated by a capacitor disk which has fingers at desired position increments. This 300 KHz carrier signal must be amplified and demodulated. Through the use of a single CMOS NOR gate and the 300 KHz logic signal from the carrier, the circuit shown in the figure will accomplish the above goals.

With reference to the figure, when the clock signal is applied, input ll of gate Gl will go high; then, output l3 of Gl will be driven to 0 volts. When the clock is 0 volts, then output 13 is at the threshold of Gl plus the amplified input

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This signal can be low-pass filtered and detected to give positional information. Because of high impedance of G1's input, the input 12 and output 13 of G1 are self-biased at the gate's threshold voltage VT . The CMOS element has an open-loop gain of about 40 dB

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