Browse Prior Art Database

Diagonally-Shaped Chip Pad Arrangement

IP.com Disclosure Number: IPCOM000046188D
Original Publication Date: 1983-Jun-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 249K

Publishing Venue

IBM

Related People

Walach, AZ: AUTHOR

Abstract

The input/output (I/O) pads of an integrated circuit (IC) chip are arranged in a diagonal or cross-shaped manner to simplify the wiring layout of a substrate having only a single wiring plane to which the chip is to be mounted.

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Diagonally-Shaped Chip Pad Arrangement

The input/output (I/O) pads of an integrated circuit (IC) chip are arranged in a diagonal or cross-shaped manner to simplify the wiring layout of a substrate having only a single wiring plane to which the chip is to be mounted.

Partially shown substrate 1 (Fig. 1) has chip-mounting pads or lands 2 which are in registration with and bonded to the superimposed I/O pads of chip C, shown in outline form for the sake of clarity. The pads 2 are connected by conductor lines 3 which fan out from the chip- mounting site to other terminations, such as, for example, conductive vias (not shown) or the lands 4 connected to the tops of the conductive pins 5 mounted in and extending through the substrate 1. As the con ductors 3 leave the mounting site, they are widened to enhance reliability and/or yield. The power pads, e.g., input power supply pads 2' and the output circuit bias pads 2" are located at or near the center of the pad arrangement. This optimizes the power supply distribution and bias distribution to the chip and results in an efficient utilization of the chip real estate.

In substrate 10 (Fig. 2) some of the conductors 13 fan out from the diagonally-shaped pad arrangement 12 to the pads 14 connected to the tops of pins 15 located on one side edge of substrate 10 and the other conductors 13 fan out to the row of contacts 16 located on the opposite side edge of substrate 10. Contacts 16 mate with the contacts of a multiwire fl...