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Two-Sort Stationary Gravity Feed Output Technique for Lsi Memory Chip Test

IP.com Disclosure Number: IPCOM000046249D
Original Publication Date: 1983-Jun-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 38K

Publishing Venue

IBM

Related People

Frank, V: AUTHOR [+5]

Abstract

The existing technique for sorting tested memory chips employs a conveyer belt onto which the tested chips are sequentially placed, for transfer to one of several removal stations where the chips are selectively removed, based upon whether they are all-good, half good, quarter good, etc. Since the memory chips produced for many products have a sufficiently high yield of all-good chips, a simpler technique is disclosed in this article for sorting these chips. A simple gravity feed technique is employed to separate all-good chips from those chips which are tested not to be all-good. The all good receptacle and the not all-good receptacle are each respectively located beneath the vacuum pencil turret where the actual testing is performed.

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Two-Sort Stationary Gravity Feed Output Technique for Lsi Memory Chip Test

The existing technique for sorting tested memory chips employs a conveyer belt onto which the tested chips are sequentially placed, for transfer to one of several removal stations where the chips are selectively removed, based upon whether they are all-good, half good, quarter good, etc. Since the memory chips produced for many products have a sufficiently high yield of all-good chips, a simpler technique is disclosed in this article for sorting these chips. A simple gravity feed technique is employed to separate all-good chips from those chips which are tested not to be all-good. The all good receptacle and the not all-good receptacle are each respectively located beneath the vacuum pencil turret where the actual testing is performed. In this manner, the many moving parts associated with the existing conveyer belt sorting arrangement are eliminated.

The gravity feed receptacle for receiving the semiconductor chip 2 carried on the downwardly facing surface 4 of the vacuum pencil 6 is shown in the figure. After the vacuum pencil 6 has registered the chip 2 over the upper surface 8 of the receptacle block 10, as is shown in the figure, the vacuum is turned off in the vacuum pencil 6, thus allowing the semiconductor chip 2 to fall into the position to prime- making contact with the corner 12 of the block 10. The upper surface of the semiconductor chip 2, when in the position to prime, contact...