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Using a Four-Bit Adder As a Comparator

IP.com Disclosure Number: IPCOM000046365D
Original Publication Date: 1983-Jul-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 62K

Publishing Venue

IBM

Related People

Stucka, SE: AUTHOR

Abstract

This article describes the use of a four-bit adder to compare two input four-bit quantities, and to produce a carry output only if one of the input quantities (A) exceeds the other (B). By using this technique, such a comparison of A and B is achieved with the adder, and it may be possible to save both card space and power over the more straightforward approach of using a comparator.

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Using a Four-Bit Adder As a Comparator

This article describes the use of a four-bit adder to compare two input four- bit quantities, and to produce a carry output only if one of the input quantities (A) exceeds the other (B). By using this technique, such a comparison of A and B is achieved with the adder, and it may be possible to save both card space and power over the more straightforward approach of using a comparator.

Fig. lA shows the function table, and Fig. lB shows the positive logic for Texas Instrument Part No. SN74LS83A four-bit binary full adder. If the CO input is grounded and the B input inverted, the circuit will produce an output carry, C4, only if A exceeds B. The connection for the adder used as a comparator is shown in Fig. 2.

The logic of this circuit is as follows:

1) If A J B, then generate output C4.

2) If A - B J 0, then generate output C4.

3) If A - B + 15 J 15, then generate output C4.

4) If A + (15 - B) J 15, then generate output C4, since 15 - B = B, where B is a four-bit binary value. 5) If A + B J l5, generate output C4.

Although this article deals with a four-bit binary number, it can easily be modified to handle larger binary numbers by cascading the adder modules.

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