Browse Prior Art Database

Programmable Variable Data Width Input/Output Formatter

IP.com Disclosure Number: IPCOM000046368D
Original Publication Date: 1983-Jul-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Anemojanis, E: AUTHOR

Abstract

This is a programmable variable data width input/output formatter that decreases the transfer time of data when invalid data is part of a buffer which can optimize the valid data transfer of partially filed buffers.

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Programmable Variable Data Width Input/Output Formatter

This is a programmable variable data width input/output formatter that decreases the transfer time of data when invalid data is part of a buffer which can optimize the valid data transfer of partially filed buffers.

This programmable logic function will transfer data between two buffers of different width and all data widths so transferred will be valid. As shown in the figure, the N width register 10 is programmed with a binary number corresponding to the data width required from the data buffer 11. For example, if the data buffer width is 40 bits but only 4 bits are needed, the N width register 10 is then programmed with a binary 4. The N counter 12 coupled to the N width register is loaded with the same binary value. As this N counter 12 counts down, its outputs are decoded by decoder 13 and the corresponding data bits are selected from the data buffer 11 through the N width circuitry. The bits so selected are shifted into the data-out register 14 from the data buffer 11. A borrow signal on line 16 from the N counter 12 reloads the N width register number into the counter. The X width register 17 is now programmed with a binary number corresponding to the data width being transferred. It can be a byte, a word or the like oriented transfer. The associated X counter 18 is now loaded with the same binary value. Each clock pulse from the data-out register decrements the X counter. A borrow signal on line 19 s...