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Technique for Observing Interfacial Films

IP.com Disclosure Number: IPCOM000046411D
Original Publication Date: 1983-Jul-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 67K

Publishing Venue

IBM

Related People

Blake, HH: AUTHOR [+2]

Abstract

This is a procedure which permits the observation on an interfacial film by optical and electron instruments. Specifically, films which cause high via resistance on integrated circuits can be identified.

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Technique for Observing Interfacial Films

This is a procedure which permits the observation on an interfacial film by optical and electron instruments. Specifically, films which cause high via resistance on integrated circuits can be identified.

As device density increases and three and four levels of metal wiring are used, via interconnection resistance becomes the criteria for high or low yields. Previously, the physical presence of an interfacial oxide film could not be established and therefore could not be analyzed. The technique herein described showed that an oxide film was causing high resistance vias, and investigation of the Al-Cu evaporation parameters determined that oxide growth was taking place after the in-situ sputter cleaning operation.

The presence of an interfacial film in high resistance vias is determined as follows:

The analysis of high via resistance yield loss product requires the deposition of a 1 m glass layer for edge protection during metallogrpahic sectioning. The chips are encapsulated in epoxy. Polishing is performed by starting with 10 m grit diamond abrasive and with succeeding steps reducing the grit down to 0.5 m. The material being polished is two levels of Al-Cu sandwiched together in a 6 m diameter via. Normal polishing of Al-Cu results in a damaged surface extending into the bulk of the film. A solution was developed which chemically removes the damaged surface metal. The solution acts as a chemical polish on a sectioned sur...