Browse Prior Art Database

Signature Analysis on Crt Controller

IP.com Disclosure Number: IPCOM000046563D
Original Publication Date: 1983-Aug-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Hanson, FA: AUTHOR

Abstract

Since signature analysis equipment generates a cyclic redundancy check code (CRC) on the data stream once given a start, stop, clock and serial data signal as inputs, it may be used to test video display controllers. In the past, the serial video data coming from a video display controller was checked in one of two ways. The first method involved connecting an actual video monitor to the card and having the operator verify the operation. With the number of characters, character sets and attributes it is impossible to verify the operation of each in a reasonable time. The second method requires large, expensive hardware to do a bit by bit comparison. For non-interlaced controllers the start and stop signals may be generated from the vertical sync pulse.

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Signature Analysis on Crt Controller

Since signature analysis equipment generates a cyclic redundancy check code (CRC) on the data stream once given a start, stop, clock and serial data signal as inputs, it may be used to test video display controllers. In the past, the serial video data coming from a video display controller was checked in one of two ways. The first method involved connecting an actual video monitor to the card and having the operator verify the operation. With the number of characters, character sets and attributes it is impossible to verify the operation of each in a reasonable time. The second method requires large, expensive hardware to do a bit by bit comparison. For non-interlaced controllers the start and stop signals may be generated from the vertical sync pulse. The data is taken from the video output, and the clock uses the internal dot clock of the card under test. For interlaced scan controllers data and clock signals may be derived from those used in the non-interlaced method. Two complete periods of the vertical sync signal are required, however, to get both the even and odd scan lines. One of two possible signatures will be generated for a good card as a function of whether analysis is begun on an odd or even scan line cycle. Inclusion of the even/odd scan control line in the generation of start-stop signals enables one signature to be generated for a good card. The use of signature analysis to verify video yields one 16-bit word...