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Discrete Sedimented Decoupling Capacitor

IP.com Disclosure Number: IPCOM000046629D
Original Publication Date: 1983-Aug-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Foss, CL: AUTHOR [+4]

Abstract

Decoupling capacitors are used to enhance the switching speed of logic chips. These capacitors can be discrete components which are located close to the chip on the substrate and which can be quickly discharged to provide the switching current. Such a capacitor will be mounted on an alumina or other packaging substrate for applications. The thickness and dielectric constant of the dielectric material must be optimized to meet the capacitance requirements. The relationship between material properties, physical dimensions and capacitance is as follows: C = K1w/ 4.45t where: C = capacitance (pF) K = dielectric constant 1 = length of dielectric (in.) w = width of dielectric (in.) t = thickness of dielectric (in.

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Discrete Sedimented Decoupling Capacitor

Decoupling capacitors are used to enhance the switching speed of logic chips. These capacitors can be discrete components which are located close to the chip on the substrate and which can be quickly discharged to provide the switching current. Such a capacitor will be mounted on an alumina or other packaging substrate for applications. The thickness and dielectric constant of the dielectric material must be optimized to meet the capacitance requirements. The relationship between material properties, physical dimensions and capacitance is as follows: C = K1w/ 4.45t where: C = capacitance (pF) K = dielectric constant 1 = length of dielectric (in.) w = width of dielectric (in.) t = thickness of dielectric (in.) Given the restriction that 1 and w are fixed by the area available on a substrate, the capacitance can only be increased by using a high K material and/or by reducing the thickness of the dielectric. Conventional thick film capacitors use materials that offer the high dielectric constant (up to 10,000). Reduction of thickness, however, is limited by fabrication techniques. To compensate for the thickness of the dielectric, a multilayer design can be used to arrange several capacitors in parallel and, hence, increase the capacitance. Thin film techniques can be used to apply very thin layers of dielectric (N 400 ~); however, the as-deposited amorphous state of the material generally exhibits a very low dielectric const...