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Memory System for Graphics Display Unit

IP.com Disclosure Number: IPCOM000046634D
Original Publication Date: 1983-Aug-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 26K

Publishing Venue

IBM

Related People

Megivern, CF: AUTHOR

Abstract

Twin memory banks permit the display of test data from one memory bank while receiving test data for storage in the other memory bank. The graphic display of data from a memory under test is an important test technique. It is also important to examine every output of the memory under test. This combination of features is difficult to achieve when testing a memory that is both fast and large, such as a charge-coupled device memory. An advantageous solution to this problem is illustrated in the figure where twin memory banks including memory A and memory B are provided. Neither memory A nor memory B by itself would be fast enough to capture new data from the memory under test and to provide data for display to the display unit.

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Memory System for Graphics Display Unit

Twin memory banks permit the display of test data from one memory bank while receiving test data for storage in the other memory bank. The graphic display of data from a memory under test is an important test technique. It is also important to examine every output of the memory under test. This combination of features is difficult to achieve when testing a memory that is both fast and large, such as a charge-coupled device memory. An advantageous solution to this problem is illustrated in the figure where twin memory banks including memory A and memory B are provided. Neither memory A nor memory B by itself would be fast enough to capture new data from the memory under test and to provide data for display to the display unit. However, with the present bank switching technique, the illustrated logic provides the test data for storage in memory A, while memory B provides the previously stored test data to the display unit. As soon as memory A is full, the logic will provide new data to memory B (the dashed data path) while the memory A data is provided to the display unit. In this way, one of the memory banks is always available to the tester, thereby capturing every cycle. The display unit can be operated in several modes. For example, assume that both memory A and memory B are large enough to store the data from at least one sector of the memory under test. Then, the same sector can be tested with varying test conditions (e...