Browse Prior Art Database

Serial Data Buffering Between Two Serial Communications Links

IP.com Disclosure Number: IPCOM000046685D
Original Publication Date: 1983-Aug-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 65K

Publishing Venue

IBM

Related People

Downes, RW: AUTHOR [+2]

Abstract

This article describes an apparatus and a method for transmitting messages between two or more distinct rings of a communication system. The apparatus includes a plurality of distinct buffering rings with an appropriate controller. When one ring desires to communicate with another ring, the buffering controller routes the message onto one of the buffer rings. The message remains on the ring until the target ring is free to accept the message. In the event that another ring elects to communicate with the same target ring, the message is also stored in another buffer ring. This arrangement allows multiple messages to be received for a single target ring. Fig. 1 is a conceptual representation of the buffered ring concept. The representation includes a pool of buffer rings with no permanent connections to one another.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 52% of the total text.

Page 1 of 2

Serial Data Buffering Between Two Serial Communications Links

This article describes an apparatus and a method for transmitting messages between two or more distinct rings of a communication system. The apparatus includes a plurality of distinct buffering rings with an appropriate controller. When one ring desires to communicate with another ring, the buffering controller routes the message onto one of the buffer rings. The message remains on the ring until the target ring is free to accept the message. In the event that another ring elects to communicate with the same target ring, the message is also stored in another buffer ring. This arrangement allows multiple messages to be received for a single target ring. Fig. 1 is a conceptual representation of the buffered ring concept. The representation includes a pool of buffer rings with no permanent connections to one another. The message is received on an adapter (A). The controller, which is associated with the buffering ring pool, connects a free buffer ring to the adapter. The adapter then clocks the message onto the buffer ring. After completion, the adapter is disconnected from the ring. When the target adapter (that is, the adapter to which a message is sent) is free, the controller connects the target adapter to the buffering ring. The adapter clocks the data from the buffering ring and transmits the message onto its resident ring. Fig. 2 shows the use of serial memories to implement the buffering ring concept. A bank...