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Browse Prior Art Database

Integrated Circuit Chip Package

IP.com Disclosure Number: IPCOM000046751D
Original Publication Date: 1983-Aug-01
Included in the Prior Art Database: 2005-Feb-07
Document File: 2 page(s) / 50K

Publishing Venue

IBM

Related People

Dillion, TE: AUTHOR

Abstract

An integrated circuit chip which has been bonded to tape automated bonding (TAB) tape is enclosed by upper and lower module shells with the TAB leads projecting through at the parting line of the two shells. The resultant package may then be inserted into a mating socket having upwardly extending pins which engage the TAB leads. In Fig. 1, integrated circuit chip 1 is inner-lead bonded to a TAB tape having the TAB leads projecting through the parting line of upper shell 3 and lower shell 4 of module 5. Shells 3 and 4 may be separate pieces, joined by a bonding technique appropriate to their composition, or they may be formed by molding in a cavity clamped about the chip. The outer edges of shells 3 and 4 have small grooves, the spacing of which matches a fixed, standard grid, as shown in Fig. 2.

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Integrated Circuit Chip Package

An integrated circuit chip which has been bonded to tape automated bonding (TAB) tape is enclosed by upper and lower module shells with the TAB leads projecting through at the parting line of the two shells. The resultant package may then be inserted into a mating socket having upwardly extending pins which engage the TAB leads. In Fig. 1, integrated circuit chip 1 is inner-lead bonded to a TAB tape having the TAB leads projecting through the parting line of upper shell 3 and lower shell 4 of module 5. Shells 3 and 4 may be separate pieces, joined by a bonding technique appropriate to their composition, or they may be formed by molding in a cavity clamped about the chip. The outer edges of shells 3 and 4 have small grooves, the spacing of which matches a fixed, standard grid, as shown in Fig. 2. Pins 6 of socket 7 are also spaced according to this grid so that TAB leads 2 of module 5 engage pins 6 of socket 7 when module 5 is downwardly inserted into socket 7. Fig. 3 shows an enlarged view of groove 8, TAB lead 2 extending therefrom, and upper and lower module shells 3 and 4. As module 5 is inserted into socket 7, pins 6 enter the lower portion of groove 8 and are guided upwardly. Pins 6 are mounted in socket 7 to be deflected outwardly by the insertion of module 5. Suitable interconnecting metallurgy coatings are employed on the portions of TAB leads 2 and pins 6 which electrically connect chip 1 to the circuitry connected to sock...